Designing for EFT & Surge Immunity

Industrial products are required to be immune to multiple disturbances which are generally present in the industrial environment. These disturbances include EFT, Surge, Power Magnetic Field etc. Thus it is mandatory for an industrial product to pass the immunity tests for above disturbances to get the FCC/CE certifications. 

EFT (Electrical Fast Transients) Tests are conducted as per Standard IEC 61000-4-4. The Test Standard defines the EFT Test methodology which defines EFT pulse as a 5/50nS pulse. i.e. EFT Pulse will have a 5nS rise time & total pulse period of 50nS. Peak voltage of the pulse will vary from 0.5kV to 4kV in accordance to EFT Test level.

Surge Tests, also known as lightning tests, are usually conducted as per Standard IEC 61000-4-5. Surge test standard defines a Pulse of 8/20uS with peak voltage ranging from 0.5kV to 8kV. Considering the worst case scenario, peak current of 2000A can flow into the device during Surge testing.

If a device needs to be protected against EFT, Surge along with ESD, ideal scenario would be a put a single protection circuit which can provide immunity against all of the above. For this, Protection circuit should have a response time in terms of few pico-seconds for EFT Immunity, whereas protection circuit should be capable of handling High current in terms of hundreds of Amps for Surge Immunity.  In addition to this, the protection circuit should have a clamping voltage which is compatible with the components present in the design.

A generic design methodology is to have an EFT & Surge certified protection diode connected to ground. Specifications of the protection diodes needs to be verified carefully, so as to make sure that the diode satisfies the fast response as well as high current requirements. In addition to this, the diode needs to be bi-directional since EFT & Surge tests will be conducted with both positive & Negative peaks.

Usually these protection diodes, will have a significant difference between standoff voltage & Clamping voltage. For example, a Surge protection diode capable of handling 100A with 5V Standoff voltage, will have around 9V-10V Clamping voltage. This becomes a concern if the components present on this signal line cannot handle a high clamping voltage.

One of the approach resolve this is to use two stage protection circuit. Here first stage, will have a high current diode with the higher clamping voltage. Second stage, will have two low power Schottky diodes, one connected to voltage rail & other connected to ground. A series resistor can be added between two stages to reduce the current flow to the second stage protection diode.

EFT & Surge tests can cause permanent damage to the board if the protection circuits are not implemented properly, because of which debugging of EFT & Surge related issues are costly & time consuming. Complete understanding of the test standards & proper analysis of protection circuits are essential for reducing the design iterations for certifying any industrial product.

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